The upcoming ESISA embedded bus and system architecture standard, being created and maintained by cefischer solutions, bases on the well known ISA bus. ESISA defines a 16-bit system architecture for embedded applications, stackable add-on modules, is thoroughly documented and comes with the following key features:
- Stackable modules in a compact 4 x 4'' (10.16 x 10.16 mm) form factor.
- Two DIN 41612 bus connectors for building high reliable module stacks including well-defined cabling options for stack-to-stack connections.
- Up to 6 extension modules per stack.
- Backplane and slot virtualization through Virtual Slot (VS) system including module stack auto configuration features.
- 8 MHz low frequency, asynchronous bus design with two-clock bus cycles at transfer rates up to 64 Mbit/s with standard and 128 Mbit/s with compressed access cycles.
- Advanced DMA architecture with up to 32 DMA channels.
- Extendable interrupt architecture with up to 64 non-shared IRQs.
- Full ISA bus cycle compatibility allows migration of existing 8-bit and 16-bit ISA compatible add-on module I/O circuitry with minimal effort.
- Completely documented, clarified ISA bus and system architecture with no references to out-of-print publications.
With ESISA, the evolution of the ISA bus is still ongoing. Explore it on this site and feel free to contact us in case of any questions! Your comments are welcome!
Upcoming Products
First
ESISA Platform SBC available in late 2012.
Publications and Articles
ESISA Bus Specification enters in print status
in late 2012.
Next complete website update including an
ESISA Bus Architectural Overview
scheduled to June 15, 2012.
Note: This site is under construction and subject to frequent changes. Please apologize for links not yet functional and contact us in case of any questions.
Last update of www.esisa.org:
May 25, 2012